Hello, I think about one problem and needed to know the opinion of true experts 
I have read on the internet that RAM needs voltage to keep data, and that, the content will disappear after time, when you disconnect the power supply, you can also rewrite it quite quickly and easily, so the sensitive datata might be unrecoverable.
But I found a study (Remanence in Semiconductor Devices Peter Gutmann IBM T.J.Watson Research Center) from 2001 on the internet, which deals with this issue in more detail and mentions the problem of "hot carriers"
4.2. Hot Carriers
High-energy electrons can cause other problems as
well. A very obvious one is that the device heats up
during operation because of collisions with the atoms in
the lattice, at least one effect of the heating being the
generation of further high-speed electrons. A problem
which is particularly acute in MOSFETs with very
small device dimensions is that of hot carriers which
are accelerated to a high energy due to the large electric
fields which occur as device dimensions are reduced
(hot-carrier effects in newer high-density DRAMs have
become so problematic that the devices contain internal
voltage converters to reduce the external 3.3 or 5V
supply by one or two volts to help combat this problem,
and the most recent ones use a supply voltage of 2.5V
for similar reasons). In extreme cases these hot
electrons can overcome the Si-SiO2 potential barrier
and be accelerated into the gate oxide and stay there as
excess charge [14]. The detrapping time for the
resulting trapped charge can range from nanoseconds to
days [15], although if the charge makes it into the
silicon nitride passivation layer it’s effectively there
permanently (one study estimated a lifetime in excess
of 30 years at 150°C) [16].
This excess charge changes the characteristics of the
device over time, reducing the on-state current in nMOSFETs
and increasing the off-state current in pMOSFETs
[17][18][19]. The change in characteristics
produces a variety of measurable effects, for example
one study found a change of several hundred millivolts
in memory cell signal voltage over a period of a few
minutes [20]. This effect is most marked when a 1 bit
is written after a 0 bit has been repeatedly read or
written from the cell, leading to a drop in the cell
threshold voltage. Writing a 0 over a 1 leads to an
increase in the cell voltage. One way to detect these
voltage shifts is to adjust the settings of the reference
cell in the sense amplifier so that instead of being set to
a median value appropriate for determining whether a
stored value represents a 0 or a 1, it can be used to
obtain a precise measurement of the actual voltage from
the cell.
Hot carriers are generated almost exclusively during switching
transitions [23][24]. The effects of the hot-carrier
stressing can be determined by measuring a variety of
device parameters, including assorted currents,
voltages, and capacitances for the device [25].
Hot-carrier and electromigration effects in the
crypto circuitry could retain an afterimage of
the key long after the original has leaked away
into the substrate.
5. Minimising RAM Data Recoverability
The previous sections have shown a variety of ways in
which stored data can leave traces of its existence
behind. These include the effects of electrical stress on
ionic contaminants and hot-carrier effects (which can
be used to recover overwritten data or data from
memory to which power has been removed), and
electromigration effects (which can be used to
determine, after indefinite time periods, which type of
signal was most commonly carried by a particular part
of a circuit).
5.1. Avoiding Short-term Retention Effects
The best way to avoid short-term retention effects is to
ensure that no memory cell holds a data value for more
than a certain amount of time. Based on the figures
given earlier, a few minutes of storage of a given value
should be treated as an upper bound; storage for any
larger amount of time will cause detectable effects in
the memory cell, although it may take quite a while
longer before these effects really become a problem. In
a series of tests carried out on a sample of SRAM
devices, changes in device threshold voltage,
transconductance, and drain-source current were
observed after 100–500 seconds of stress, leading to a
corresponding change in SRAM access time and
operating voltage [43]. As the SRAM cell in Figure 4
indicates, reads and writes of 0 and 1 bits stress
different access transistors in the cell so that it’s
possible to determine whether a 0 or 1 was stored there
by determining which transistor was stressed the most
(the grey dots in the figure indicate the main stress
locations). The change in cell behaviour can be
determined by recording the cell access time, through
voltage microprobing of the cell’s transistors, or using
some of the other techniques mentioned earlier. Similar
tests have been performed on DRAMs, although in this
case the emphasis was on stress effects on shared
circuitry such as address buffers and sense amplifiers.
While there were quite noticeable effects in all of these
areas the study didn’t examine the effect on individual
storage cells [44].
So if I understood it well, the main problem is the high temperatures of the HW device. According to my considerations, this problem could be overcome by better cooling in the form of cooling pad, fan, or a better airflow.
Is there an expert who understands this issue, and would you please advise me?
I have read on the internet that RAM needs voltage to keep data, and that, the content will disappear after time, when you disconnect the power supply, you can also rewrite it quite quickly and easily, so the sensitive datata might be unrecoverable.
But I found a study (Remanence in Semiconductor Devices Peter Gutmann IBM T.J.Watson Research Center) from 2001 on the internet, which deals with this issue in more detail and mentions the problem of "hot carriers"
4.2. Hot Carriers
High-energy electrons can cause other problems as
well. A very obvious one is that the device heats up
during operation because of collisions with the atoms in
the lattice, at least one effect of the heating being the
generation of further high-speed electrons. A problem
which is particularly acute in MOSFETs with very
small device dimensions is that of hot carriers which
are accelerated to a high energy due to the large electric
fields which occur as device dimensions are reduced
(hot-carrier effects in newer high-density DRAMs have
become so problematic that the devices contain internal
voltage converters to reduce the external 3.3 or 5V
supply by one or two volts to help combat this problem,
and the most recent ones use a supply voltage of 2.5V
for similar reasons). In extreme cases these hot
electrons can overcome the Si-SiO2 potential barrier
and be accelerated into the gate oxide and stay there as
excess charge [14]. The detrapping time for the
resulting trapped charge can range from nanoseconds to
days [15], although if the charge makes it into the
silicon nitride passivation layer it’s effectively there
permanently (one study estimated a lifetime in excess
of 30 years at 150°C) [16].
This excess charge changes the characteristics of the
device over time, reducing the on-state current in nMOSFETs
and increasing the off-state current in pMOSFETs
[17][18][19]. The change in characteristics
produces a variety of measurable effects, for example
one study found a change of several hundred millivolts
in memory cell signal voltage over a period of a few
minutes [20]. This effect is most marked when a 1 bit
is written after a 0 bit has been repeatedly read or
written from the cell, leading to a drop in the cell
threshold voltage. Writing a 0 over a 1 leads to an
increase in the cell voltage. One way to detect these
voltage shifts is to adjust the settings of the reference
cell in the sense amplifier so that instead of being set to
a median value appropriate for determining whether a
stored value represents a 0 or a 1, it can be used to
obtain a precise measurement of the actual voltage from
the cell.
Hot carriers are generated almost exclusively during switching
transitions [23][24]. The effects of the hot-carrier
stressing can be determined by measuring a variety of
device parameters, including assorted currents,
voltages, and capacitances for the device [25].
Hot-carrier and electromigration effects in the
crypto circuitry could retain an afterimage of
the key long after the original has leaked away
into the substrate.
5. Minimising RAM Data Recoverability
The previous sections have shown a variety of ways in
which stored data can leave traces of its existence
behind. These include the effects of electrical stress on
ionic contaminants and hot-carrier effects (which can
be used to recover overwritten data or data from
memory to which power has been removed), and
electromigration effects (which can be used to
determine, after indefinite time periods, which type of
signal was most commonly carried by a particular part
of a circuit).
5.1. Avoiding Short-term Retention Effects
The best way to avoid short-term retention effects is to
ensure that no memory cell holds a data value for more
than a certain amount of time. Based on the figures
given earlier, a few minutes of storage of a given value
should be treated as an upper bound; storage for any
larger amount of time will cause detectable effects in
the memory cell, although it may take quite a while
longer before these effects really become a problem. In
a series of tests carried out on a sample of SRAM
devices, changes in device threshold voltage,
transconductance, and drain-source current were
observed after 100–500 seconds of stress, leading to a
corresponding change in SRAM access time and
operating voltage [43]. As the SRAM cell in Figure 4
indicates, reads and writes of 0 and 1 bits stress
different access transistors in the cell so that it’s
possible to determine whether a 0 or 1 was stored there
by determining which transistor was stressed the most
(the grey dots in the figure indicate the main stress
locations). The change in cell behaviour can be
determined by recording the cell access time, through
voltage microprobing of the cell’s transistors, or using
some of the other techniques mentioned earlier. Similar
tests have been performed on DRAMs, although in this
case the emphasis was on stress effects on shared
circuitry such as address buffers and sense amplifiers.
While there were quite noticeable effects in all of these
areas the study didn’t examine the effect on individual
storage cells [44].
So if I understood it well, the main problem is the high temperatures of the HW device. According to my considerations, this problem could be overcome by better cooling in the form of cooling pad, fan, or a better airflow.
Is there an expert who understands this issue, and would you please advise me?
