RAM recovery

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  • BlindSeeker
    PCHF Member
    • Jun 2022
    • 22

    #31
    @bbdra - How is this thread relevant and where are you going with your query? PC components are low power devices. Inject more than few miliamps into the RAM or CPU and you destroy them. Send enough high frequency energy at them causes the same effect. Have you ever seen what a near lightning strike does to an unprotected PC?

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    • BlindSeeker
      PCHF Member
      • Jun 2022
      • 22

      #32
      Oh for heaven’s sake. The OP needs to aim his\her questions at the authors of the thesis in question. The works from the University of Michigan have no real world practicality.

      Comment

      • Bruce
        PCHF Moderator
        • Oct 2017
        • 10702

        #33
        what modern home PC uses DDR2 memory still?

        Comment

        • bbdra
          PCHF Member
          • May 2019
          • 89

          #34
          Originally posted by BlindSeeker
          @bbdra - How is this thread relevant and where are you going with your query? PC components are low power devices. Inject more than few miliamps into the RAM or CPU and you destroy them. Send enough high frequency energy at them causes the same effect. Have you ever seen what a near lightning strike does to an unprotected PC?
          In terms of safety and privacy, this could be important, for example, for searching of cryptokeys. Just high temperatures cannot be a risk?

          4.2. Hot Carriers
          High-energy electrons can cause other problems as
          well. A very obvious one is that the device heats up
          during operation because of collisions with the atoms in
          the lattice, at least one effect of the heating being the
          generation of further high-speed electrons. A problem
          which is particularly acute in MOSFETs with very
          small device dimensions is that of hot carriers which
          are accelerated to a high energy due to the large electric
          fields which occur as device dimensions are reduced
          (hot-carrier effects in newer high-density DRAMs have
          become so problematic that the devices contain internal
          voltage converters to reduce the external 3.3 or 5V
          supply by one or two volts to help combat this problem,
          and the most recent ones use a supply voltage of 2.5V
          for similar reasons). In extreme cases these hot
          electrons can overcome the Si-SiO2 potential barrier
          and be accelerated into the gate oxide and stay there as
          excess charge [14]. The detrapping time for the
          resulting trapped charge can range from nanoseconds to
          days [15], although if the charge makes it into the
          silicon nitride passivation layer it’s effectively there
          permanently (one study estimated a lifetime in excess
          of 30 years at 150°C) [16].

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          • BlindSeeker
            PCHF Member
            • Jun 2022
            • 22

            #35
            What do you think kills most CPUs, GPUs and Memory? Heat. Most IC substrates begin to breakdown above 150 C..

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            • bbdra
              PCHF Member
              • May 2019
              • 89

              #36
              Originally posted by BlindSeeker
              What do you think kills most CPUs, GPUs and Memory? Heat. Most IC substrates begin to breakdown above 150 C..
              This mean the temperatures would have to be around 150 ° C to create excess charges, or what temperatures would have to be to create them?

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              • BlindSeeker
                PCHF Member
                • Jun 2022
                • 22

                #37
                Originally posted by bbdra
                This mean the temperatures would have to be around 150 ° C to create excess charges, or what temperatures would have to be to create them?
                I afraid I have no answer for you. My degrees are in Electrical Engineering and Communications. Also I don’t have access to the multi-million dollar equipment to test out a concept. As stated earlier, You need to pose these questions to the authors of the thesis you are citing. Any data recovery becomes more difficult the more volatile the data device is. RAM will retain its last state content until the charge state changes. Raise or lower the steady state charge changes the block address the charge is applied to. Also you have to know the block address of the data you what to recover. Now do you understand why recovering data from volatile memory is impractical? Notice I did not say impossible. Anything is possible given the money, equipment, time and knowledge.

                Comment

                • bbdra
                  PCHF Member
                  • May 2019
                  • 89

                  #38
                  Originally posted by BlindSeeker
                  I afraid I have no answer for you. My degrees are in Electrical Engineering and Communications. Also I don’t have access to the multi-million dollar equipment to test out a concept. As stated earlier, You need to pose these questions to the authors of the thesis you are citing. Any data recovery becomes more difficult the more volatile the data device is. RAM will retain its last state content until the charge state changes. Raise or lower the steady state charge changes the block address the charge is applied to. Also you have to know the block address of the data you what to recover. Now do you understand why recovering data from volatile memory is impractical? Notice I did not say impossible. Anything is possible given the money, equipment, time and knowledge.
                  Can’t be high energies created for example by short current peaks or by current noise?
                  If there is no other cause for creating high electrons, except temperatures, good cooling could be the solution, what you think?

                  Comment

                  • bbdra
                    PCHF Member
                    • May 2019
                    • 89

                    #39
                    I have read an article about “Hot-carrier injection” on Wikipedia, which is full of interesting informations.
                    One of the things I have confirmed is that to become “hot” and enter the conduction band of SiO2, an electron must gain a kinetic energy of ~3.2 eV. For holes, the valence band offset in this case dictates they must have a kinetic energy of 4.6 eV.
                    The question remains whether such kinetic energy can be created in low-powered devices, like desktop pc or notebook, assuming that external stress of ram module is 1.8V and internal voltage between 0.4V - 0.6V?

                    Another important information is that the term “hot electron” comes from the effective temperature term used when modelling carrier density (i.e., with a Fermi-Dirac function) and does not refer to the bulk temperature of the semiconductor (which can be physically cold, although the warmer it is, the higher the population of hot electrons it will contain all else being equal).
                    This passage confuses me a bit. How can effective temperature be high to produce a hot electron and at the same time bulk temperature of the semiconductor cold? Do you think something like this could occur in a regular desktop PC or nontebook?

                    Hot electrons can be created when a high-energy photon of electromagnetic radiation (such as light) strikes a semiconductor.
                    This is probably not the case for a regular scenario, what do you think, can something like this happen to usual user in home environment?

                    Furthermore stands there that Hot electrons arise generically at low temperatures even in degenerate semiconductors or metals.
                    Which could be concluded that they could be there after all, although it might not be the extreme case where SI-Sio2 potential barrier could be overcome, according to my reflections.

                    And then there are information about Scaling and Reliability Impact:

                    Advances in semiconductor manufacturing techniques and ever increasing demand for faster and more complex integrated circuits (ICs) have driven the associated Metal–Oxide–Semiconductor field-effect transistor (MOSFET) to scale to smaller dimensions.

                    However, it has not been possible to scale the supply voltage used to operate these ICs proportionately due to factors such as compatibility with previous generation circuits, noise margin, power and delay requirements, and non-scaling of threshold voltage, subthreshold slope, and parasitic capacitance.

                    As a result, internal electric fields increase in aggressively scaled MOSFETs, which comes with the additional benefit of increased carrier velocities (up to velocity saturation), and hence increased switching speed,[9] but also presents a major reliability problem for the long term operation of these devices, as high fields induce hot carrier injection which affects device reliability.

                    Large electric fields in MOSFETs imply the presence of high-energy carriers, referred to as “hot carriers”. These hot carriers that have sufficiently high energies and momenta to allow them to be injected from the semiconductor into the surrounding dielectric films such as the gate and sidewall oxides as well as the buried oxide in the case of silicon on insulator (SOI) MOSFETs.

                    The presence of such mobile carriers in the oxides triggers numerous physical damage processes that can drastically change the device characteristics over prolonged periods. The accumulation of damage can eventually cause the circuit to fail as key parameters such as threshold voltage shift due to such damage. The accumulation of damage resulting degradation in device behavior due to hot carrier injection is called “hot carrier degradation”.

                    The useful life-time of circuits and integrated circuits based on such a MOS device are thus affected by the life-time of the MOS device itself. To assure that integrated circuits manufactured with minimal geometry devices will not have their useful life impaired, the life-time of the component MOS devices must have their HCI degradation well understood. Failure to accurately characterize HCI life-time effects can ultimately affect business costs such as warranty and support costs and impact marketing and sales promises for a foundry or IC manufacturer.

                    What conclusion could you draw from these informations? Is it a threat even in the case of low powered devices?

                    Comment

                    • Pyro
                      PCHF Member
                      • Jan 2019
                      • 1189

                      #40
                      I’ve never experienced it even in heavy computing. I think in any home-computer tasks you will be more than okay and do not have to worry about ram cooling as long as there is adequate case cooling.

                      This thread seems to keep going in circles, so I’m going to generalize and say all of those articles are based on either deliberate attempts to create said problem or scenarios where the electronics are being pushed far past whatever thresholds and limits they may have.

                      If this was a common issue consumer-devices suffered from there would be far more information about it from people experiencing it, not just theoretical scenarios.

                      Comment

                      • Bruce
                        PCHF Moderator
                        • Oct 2017
                        • 10702

                        #41
                        I’ll step back with a final say…

                        probably because this is not a real-world problem and has never been seen in home, office, or industry computing, it just isn’t something to get worked up about.

                        super computers working out Pi to the trillionth place - maybe.
                        winning the race to build a machine with the most FLOPS - OK. (actually achieved by Frontier last month, breaking the exascale barrier)

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                        • bbdra
                          PCHF Member
                          • May 2019
                          • 89

                          #42
                          I was pleased that there were people who were able and willing to advise me on this matter, and I would welcome if anyone else would like to comment on this topic

                          Comment

                          • bbdra
                            PCHF Member
                            • May 2019
                            • 89

                            #43
                            Originally posted by BlindSeeker
                            @Bruce - I doubt this will play out much more Mate. I’ve been in computing hardware since the punch card days and have only seen hardware with the high energy load needed in some of the super computer setups.. Some of those beasts had their RAM cooled with cryo fluids.
                            Originally posted by Pyro
                            I’ve never experienced it even in heavy computing. I think in any home-computer tasks you will be more than okay and do not have to worry about ram cooling as long as there is adequate case cooling.

                            This thread seems to keep going in circles, so I’m going to generalize and say all of those articles are based on either deliberate attempts to create said problem or scenarios where the electronics are being pushed far past whatever thresholds and limits they may have.

                            If this was a common issue consumer-devices suffered from there would be far more information about it from people experiencing it, not just theoretical scenarios.
                            Originally posted by Bruce
                            I’ll step back with a final say…

                            probably because this is not a real-world problem and has never been seen in home, office, or industry computing, it just isn’t something to get worked up about.

                            super computers working out Pi to the trillionth place - maybe.
                            winning the race to build a machine with the most FLOPS - OK. (actually achieved by Frontier last month, breaking the exascale barrier)
                            I just remembered hearing about the HC effect in relation to EEPROM, specifically:

                            Hot carrier injection (HCI) is a phenomenon in solid-state electronic devices where an electron or a “hole” gains sufficient kinetic energy to overcome a potential barrier necessary to break an interface state. The term “hot” refers to the effective temperature used to model carrier density, not to the overall temperature of the device. Since the charge carriers can become trapped in the gate dielectric of a MOS transistor, the switching characteristics of the transistor can be permanently changed. Hot-carrier injection is one of the mechanisms that adversely affects the reliability of semiconductors of solid-state devices.[1]

                            HCI and NOR flash memory cells
                            HCI is the basis of operation for a number of non-volatile memory technologies such as EPROM cells. As soon as the potential detrimental influence of HC injection on the circuit reliability was recognized, several fabrication strategies were devised to reduce it without compromising the circuit performance.

                            NOR flash memory exploits the principle of hot carriers injection by deliberately injecting carriers across the gate oxide to charge the floating gate. This charge alters the MOS transistor threshold voltage to represent a logic ‘0’ state. An uncharged floating gate represents a ‘1’ state. Erasing the NOR Flash memory cell removes stored charge through the process of Fowler–Nordheim tunneling.

                            Because of the damage to the oxide caused by normal NOR Flash operation, HCI damage is one of the factors that cause the number of write-erase cycles to be limited. Because the ability to hold charge and the formation of damage traps in the oxide affects the ability to have distinct ‘1’ and ‘0’ charge states, HCI damage results in the closing of the non-volatile memory logic margin window over time. The number of write-erase cycles at which ‘1’ and ‘0’ can no longer be distinguished defines the endurance of a non-volatile memory.

                            From this I conclude that Hot electrons and Hot-carrier injections can also be in low-powered devices, including RAM, because EEPROM is there too.

                            What do you think about it?

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