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Intel's eASIC partnership boosts custom Xeon chips for big data workloads


PCHF Tech News
Jan 10, 2015

Intel has agreed a deal with eASIC to develop a new breed of customised Xeon chip designed for specific workloads like security and big data that can cut the time-to-market for chips in half.

The collaboration is part of Intel's plan to get reprogrammable technology inside its Xeon processors and bring a greater level of performance and power at a more competitive price level.

In order to bring that new level of customisation to its chips, eASIC will integrate its renowned platform technology with future Intel Xeon chips to bring a highly customised and integrated hardware solution to cloud service providers.

The new technology will reportedly enable acceleration of up to two times that of a field programmable gate array (FPGA) for workloads like security and big data analytics, and accelerate the time-to-market for custom application specific integrated circuit (ASIC) development by up to 50%.

Intel hand-picked eASIC to provide the technology because it can increase flexibility and fast-time-to-market compared to traditional ASICs as well as increased performance and lower power consumption when up against FPGAs.

No confirmation on the chips

"Having the ability to highly customise our solutions for a given workload will not only make the specific application run faster, but also help accelerate the growth of exciting new applications like visual search," said Diane Bryant, senior vice president and general manager of Intel's Data Centre Group.

Neither firm clarified the Xeon chips that will be getting the eASIC treatment beyond stating that it will be "future Intel Xeon processors".



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